(1) Field of the Invention
This invention relates to a drive circuit for the display device having plural drive elements each of which drive plural pixels (picture elements), wherein the display luminance has been so designed as to change as the number of the sustaining pulses, sustaining voltage and current provided from each drive element to display panel change based on the input image signal.
The present invention also relates to a drive circuit of a display device that displays multi-tone image by timesharing one screen display duration (one frame, for instance) of display panel into the plural display durations (subfields, for instance) that correspond to the display tone and by weighting the sustaining pulse number of respective divided (time-shared) display durations.
(2) Description of the Prior Art
The driving method of PDP (Plasma Display Panel) is a direct drive by digitalized image input signal. The luminance and tone of the light emitted from the panel face depends on the bit number of the signal dealt with.
AC type PDP features satisfactory characteristics as far as is concerned the luminance and durability. As for the tonal display, however, an ADS subfield method (Address/Display Separate type drive method) has been proposed only recently that enables 256 tones.
FIGS. 1(a) and 1(b) show the drive sequence and drive waveform of the PDP which is used in this ADS subfield method.
In FIG. 1(a), which gives an example of 8-bits 256 tones, one frame consists of eight subfields whose relative ratios of luminance are 1, 2, 4, 8, 16, 32, 64 and 128 respectively. Combination of these luminances of eight screens enables a display in 256 tones. The respective subfields are composed of the address duration that writes one screen of refreshed data and the sustaining duration that decides the luminance level of the subfield. The detail of this configuration is explained in FIG. 1(b). In the address duration, a wall charge is formed initially at each pixel simultaneously over all the screens and then the sustaining pulses are given to all the screens for display. The brightness of the subfield is proportional to the number of the sustaining pulses to be set to predetermined luminance. Two hundred and fifty-six tones display is thus realized.
AC type PDP display device has plural drive elements (101, 102, . . . 130n) as shown in FIG. 2. The respective drive elements 101, 102, . . . 10n drive the plural pixels of PDP16 by the drive control signal from a display drive control circuit 14 based on the image signal as input into the image signal input terminal 12. This type of method was however problematical in that the load as against the drive element and the emission luminance differ when the drive voltage (sustaining voltage and address voltage, for instance) is applied to all the plural pixels whose drive is taken charge of by one drive element, that is when the pixels are discharged, and when it is supplied only to a part of the pixels.
Conventionally attempts had been made to solve such a problem by enhancing the capacity of the individual drive elements or by mitigating the load to individual drive elements through an increase of the number of the drive elements. However, this conventional approach was disadvantageous in that though the event of differential emission luminance characteristic can be moderated, it cannot be annihilated and that a large capacity of drive elements had to be prepared. Further the number of drive elements required was too large.
The conventional method was also problematical in that when such display device as shown in FIG. 2 displays a multi-tone image by the ADS subfield method, the tonal characteristic worsens. Let us consider, for example, an image where the most of displayed image is composed of the image level "127" (01111111 by 8-bits binary notation) and the small remaining area is composed of an image level "128" (10000000 by 8-bits binary notation). When the display load factor of MSB (Most Significant Bit) subfield is compared with that of the subfield other than MSB, the former is smaller than the latter. It was unsustainable because this difference in load factor raised the emission luminance characteristic and worsened the tonal characteristic.
To solve such problematical points as above, the applicant has already proposed such a circuit as shown in FIG. 3. That is, a display area detect circuit 20 is inserted between an image signal input terminal 12 and a display drive control circuit 14. The display area detect circuit 20 detects the display area for every certain duration (for example, one frame or one subfield) based on the image signal as input into the image signal input terminal 12 to control the number of the sustaining pulses (drive pulses) in response to the detected area
More concretely, the display area detect circuit 20 comprises a display load factor detect circuit (a counter, for instance) that detects the display load factor for a certain duration and the sustaining pulse control circuit [LUT (Look Up Table), for instance] that controls the number of sustaining pulses, sustaining voltage or sustaining current based on the output detected by the display load factor detect circuit. The emission luminance characteristic can thus be maintained constant irrespectively of the display load factor of the display panel. This configuration further prevents the deterioration of the tonal characteristic due to the subfield drive method.
However, the circuit as shown in FIG. 3 was somewhat problematical in that the configuration of the display area detect circuit 20 becomes complicated when one frame of the PDP 16 is time-shared into eight display durations (subfields) corresponding to 8-bits display tones and the number of the sustaining pulses of the respective divided display durations are weighted to display 256 tones of image. This is because we need eight display load factor detect circuits and eight sustaining pulse control circuits for as many subfields. In FIG. 3, the numeral 10 indicates the group of drive elements representing all the drive elements 101, 102, . . . 10n as shown in FIG. 2.